specifications and information are subject to change without notice triquint semiconductor, inc ? phone +1-503-615-9000 ? fax: +1-503-615-8900 ? e-mail: info-sales@tqs.com ? web site: www.triquint.com page 1 of 5 jan 2010 vg112 pcs/umts-band variable gain amplifier product features ? 1800 ? 2200 mhz bandwidth ? 25 db gain at 1.9 ghz ? 28 db attenuation range ? +46 dbm output ip3 ? +30 dbm p1db ? constant ip3 & p1db over attenuation range ? +5v single voltage supply ? pb-free / green / rohs-compliant 6x6 mm qfn package ? mttf > 100 years applications ? xmit & rcv agc circuitry for mobile infrastructure product description the vg112 is a pcs / umts-band high dynamic range variable gain amplifier (vga) housed in a low profile pb-free / green / rohs-compliant surface-mount leadless qfn package that measures 6 x 6 mm square. the +30 dbm output compression point and +46 dbm output intercept point of the amplifier are maintained over the entire attenuation rang e, making the vg112 ideal for use in transmitter and receiver agc circuits. the high gain of the dual-stage amplifier allows for more integration in a transceiver board while requiri ng minimal printed circuit board space. superior thermal design allows the product to have a minimum mttf rating of 100 years at a mounting temperature of +85 oc. all devices are 100% rf & dc tested and packaged on tape and reel for automated surface- mount assembly. functional diagram specifications (1) parameter units min typ max conditions operational bandwidth mhz 1800 2200 test frequency mhz 2140 see note 1 gain at min. attenuation db 20.5 23 input return loss db 18 output return loss db 8.2 output p1db dbm +30 output ip3 dbm +43 +46 see note 2 noise figure at min. attenuation db 8 v ctrl = 0 v gain variation range db 23.5 28 see note 3 gain variation control voltage, v ctr l v 0 4.5 see note 1 supply voltage, v cc v +5 operating amplifier current range ma 350 415 475 pin 25 gain control pin current ma 20 v ctrl = 4.5 v. see note 1. 1. test conditions unless otherwise noted: 25 oc, vcc = +5 v in a tuned application circuit. vctrl is the control voltage th rough a 220 dropping resistor as shown in the same application circuit. 2. 3oip measured with two tones at an output power of +15 dbm/tone separated by 1 mhz. the suppression on the largest im3 pr oduct is used to calculate the 3oip using a 2:1 rule. 3. the gain variation range is measured as the differ ence in gain with vctrl = 0v and vctrl = 4.5v at 2.14 ghz. absolute maximum rating parameter rating storage temperature -55 to +125 c thermal resistance, rth 33 c / w pin 5 (gain control) current 30 ma max. junction temperature +200 c operation of this device above any of th ese parameters may cause permanent damage. ordering information part no. description vg112-g pcs/umts-band variable gain amplifier (lead-free/green/rohs-com pliant qfn package) VG112-PCB2140 2140 mhz fully assembled application board standard tape / reel size = 500 pieces on a 7 reel gnd gnd gain ctrl gnd gnd gnd vbias1 8 9 10 11 12 13 14 7 6 5 4 3 2 1 15 16 17 18 19 20 21 gnd vcc1 gnd rf out / vcc2 gnd gnd gnd gnd gnd rf in gnd gnd gnd gnd gnd gnd gnd vbias2 gnd gnd variable a ttenuato r a mp 28 27 26 25 24 23 22 rf out / vcc2
specifications and information are subject to change without notice triquint semiconductor, inc ? phone +1-503-615-9000 ? fax: +1-503-615-8900 ? e-mail: info-sales@tqs.com ? web site: www.triquint.com page 2 of 5 jan 2010 vg112 pcs/umts-band variable gain amplifier 2140 mhz application circuit performance performance using the circuitry on the VG112-PCB evaluation board ? the center of c5 should be placed 5mm (.197?) away from the edge of the vg112. ? the input trace is a high impedance line and is needed to get a good input match into the vga. ? the board is optimized for performance at 2140 mhz. performan ce at 1960 mhz can be optimized by replacing c5 with 2.7 pf at location a on the wj vg112 evaluation board. circuit board material: .014? fr-4, 4 layers, .062? total thickness bill of materials ref. des. description size c1, c7, c10 47 pf chip capacitor 0603 c2, c3, c4, c8, c9 1000 pf chip capacitor 0603 c5 2.4 pf chip capacitor 0603 c6 3.3 chip resistor 0603 r3 75 s21 vs. frequency vctrl=0v (maximum gain setting) 18 20 22 24 26 28 1800 1900 2000 2100 2200 frequency (mhz) s21 (db) -40 c +25 c +85 c s11 vs. frequency vctrl=0v (maximum gain setting) -25 -20 -15 -10 -5 0 1800 1900 2000 2100 2200 frequency (mhz) s11 (db) -40 c +25 c +85 c s22 vs. frequency vctrl=0v (maximum gain setting) -25 -20 -15 -10 -5 0 1800 1900 2000 2100 2200 frequency (mhz) s22 (db) -40 c +25 c +85 c s21 vs. frequency vs. control voltage -10 0 10 20 30 1800 1900 2000 2100 2200 frequency (mhz) s21 (db) vctrl=0.00v vctrl=0.73v vctrl=1.06v vctrl=1.52v vctrl=2.20v vctrl=4.50v s11 vs. frequency vs. control voltage -25 -20 -15 -10 -5 0 1800 1900 2000 2100 2200 frequency (mhz) s11 (db) vctrl=0.00v vctrl=0.73v vctrl=1.06v vctrl=1.52v vctrl=2.20v vctrl=4.50v s22 vs. frequency vs. control voltage -25 -20 -15 -10 -5 0 1800 1900 2000 2100 2200 frequency (mhz) s22 (db) vctrl=0.00v vctrl=0.73v vctrl=1.06v vctrl=1.52v vctrl=2.20v vctrl=4.50v
specifications and information are subject to change without notice triquint semiconductor, inc ? phone +1-503-615-9000 ? fax: +1-503-615-8900 ? e-mail: info-sales@tqs.com ? web site: www.triquint.com page 3 of 5 jan 2010 vg112 pcs/umts-band variable gain amplifier 2140 mhz application circuit performance oip3 vs. output power vs. temperature frequency = 2140, 2141 mhz, 0db atten. 38 40 42 44 46 48 10 12 14 16 18 20 output power per tone (dbm) oip3 (dbm) +25 c -40 c +85 c oip3 vs. output power vs. temperature frequency = 2140, 2141 mhz, 5db atten. 38 40 42 44 46 48 10 12 14 16 18 20 output power per tone (dbm) oip3 (dbm) +25 c -40 c +85 c oip3 vs. output power vs. temperature frequency = 2140, 2141 mhz, 10db atten. 38 40 42 44 46 48 10 12 14 16 18 20 output power per tone (dbm) oip3 (dbm) +25 c -40 c +85 c oip3 vs. output power vs. temperature frequency = 2140, 2141 mhz, 15db atten. 38 40 42 44 46 48 10 12 14 16 18 20 output power per tone (dbm) oip3 (dbm) +25 c -40 c +85 c oip3 vs. pout vs. attenuation setting frequency = 2140, 2141 mhz, +25 c 38 40 42 44 46 48 10 12 14 16 18 20 output power per tone (dbm) oip3 (dbm) 0 db atten 5 db atten 10 db atten 15 db atten imd products vs. output power fundamental frequency = 2140, 2141 mhz; +25 c, 0db atten -80 -70 -60 -50 -40 10 12 14 16 18 20 output power per tone (dbm) imd products (dbc) imd_low imd_high p1db vs. temperature frequency = 2140 mhz, 0db atten. 22 24 26 28 30 32 -40 -15 10 35 60 85 temperature (c) p1db (dbm) aclr vs. channel power 3gpp w-cdma, test model 1+64 dpch, 5 mhz offset, 2140 mhz -60 -55 -50 -45 -40 18 19 20 21 22 output channel power (dbm) aclr (dbc) -40 c +25 c +85 c normalized gain vs. vctrl 2140 mhz, vctrl is as shown in the application circuit -30 -25 -20 -15 -10 -5 0 012345 vctrl (v) normalized gain (db) -40 c +25 c +85 c normalized gain vs. ictrl 2140 mhz -30 -25 -20 -15 -10 -5 0 024681012 attenuation control current (ma) normalized gain (db) -40 c +25 c +85 c ictrl vs. vctrl vctrl is as shown in the application circuit 0 2 4 6 8 10 12 012345 vctrl (v) ictrl (ma) -40 c +25 c +85 c noise figure vs. frequency vs. temperature vctrl=0v (maximum gain setting) 5 6 7 8 9 10 1800 1900 2000 2100 2200 frequency (mhz) nf (db) -40 c +25 c +85 c phase vs. normalized gain 2140 mhz -10 -5 0 5 10 15 20 0 5 10 15 20 25 30 normalized gain (db) phase (deg)
specifications and information are subject to change without notice triquint semiconductor, inc ? phone +1-503-615-9000 ? fax: +1-503-615-8900 ? e-mail: info-sales@tqs.com ? web site: www.triquint.com page 4 of 5 jan 2010 vg112 pcs/umts-band variable gain amplifier application note: reduced bias configurations the vg112 can be configured to be operated with lower bias current by varying the bias-adjust resistors ? r3 and r4 ? which set the current draw for the two stages of the amplifier. th e recommended circuit configurations shown previously in this datasheet have the device operating in class a operation. lowering the current moderately can be done at the expense of the linearity performance of the device. measured data is given below and represents the vg112 configured for 2.14 ghz applications. since the second stage am plifier dominates the current draw of the 2-stage amplifier inside the vg112, modifying r3 will have the greatest effect upon the overall curren t draw of the device. data is shown though to display the ic c and performance effects of the device when r4 , the bias-adjust resistor for the first-st age amplifier, is modified when r3 is fixed. performance data at 2.14 ghz r3 ( ? ) r4 ( ? ) icq (ma) p diss (w) gain (db) oip3 (dbm) p1db (dbm) 75 0 436 2.18 24.0 46.3 30.7 174 0 304 1.52 23.7 42.5 30.8 383 0 207 1.04 23.3 33.4 30.9 787 0 155 0.78 22.5 27.7 29.7 174 101 284 1.42 23.5 42.3 30.6 174 270 264 1.32 23.3 41.6 30.4 174 499 251 1.26 23.0 40.2 29.8 174 699 244 1.22 22.7 38.9 29.1 current vs. r3 value 200 250 300 350 400 450 0 100 200 300 400 r3 value (ohms) icc (ma)
specifications and information are subject to change without notice triquint semiconductor, inc ? phone +1-503-615-9000 ? fax: +1-503-615-8900 ? e-mail: info-sales@tqs.com ? web site: www.triquint.com page 5 of 5 jan 2010 vg112 pcs/umts-band variable gain amplifier mechanical information this package is lead-free/gr een/rohs-compliant. the plating material on the pins is annealed matte tin over copper. it is com patible with both lead-free (maximum 260 c reflow temperature) and leaded (maximum 245 c reflow temperature) soldering processes. outline drawing mounting configuration / land pattern product marking the component will be lasermarked with a ?vg112-g? designator with an alphanumeric lot code on the top surface of the package. tape and reel specifications for this part will be located on the website in the ?application notes? section. esd / msl information esd rating: class 1b value: passes 500v to <1000v test: human body model (hbm) standard: jedec standard jesd22-a114 esd rating: class iv value: passes 1000v to <2000v test: charged device model (cdm) standard: jedec standard jesd22-c101 msl rating: level 2 at +260 c convection reflow standard: jedec standard j-std-020 functional pin layout pin no function 1 vbias1 5 gain control 11 rf input 19 vbias2 23, 25 rf output / vcc2 27 vcc1 even numbered pins and backside paddle ground 3, 7, 9, 13, 15, 17, 21 no connect or ground gnd gnd gain ctrl gnd gnd gnd vbias1 8 9 10 11 12 13 14 7 6 5 4 3 2 1 15 16 17 18 19 20 21 gnd vcc1 gnd rf out / vcc2 gnd gnd gnd gnd gnd rf in gnd gnd gnd gnd gnd gnd gnd vbias2 gnd gnd variable a ttenuato r a mp 28 27 26 25 24 23 22 rf out / vcc2
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